Reliability Wearout Mechanisms in Advanced CMOS Technologies : Microelectronic Systems Series, Book 12 (eBook)
by Alvin W. Strong and Ernest Y. Wu and Rolf-Peter Vollertsen

Download

Language: English

$136.95
Retail Price: $171.00
 

Connect with BAM!

Share this with a friend

See what others are saying

 

0 Ratings

 
 
 

Quick Links:
Overview
Details
Creators
Customer Reviews
Discussion
Hardcover
Online Price: $171.00		In Stock. 
 
 
 
Overview

A comprehensive treatment of all aspects of CMOS reliability wearout mechanisms


This book covers everything students and professionals need to know about CMOS reliability wearout mechanisms, from basic concepts to the tools necessary to conduct reliability tests and analyze the results. It is the first book of its kind to bring together the pertinent physics, equations, and procedures for CMOS technology reliability in one place. Divided into six relatively independent topics, the book covers:





  • Introduction to Reliability



  • Gate Dielectric Reliability



  • Negative Bias Temperature Instability



  • Hot Carrier Injection



  • Electromigration Reliability



  • Stress Voiding



Chapters conclude with practical appendices that provide very basic experimental procedures for readers who are conducting reliability experiments for the first time. Reliability Wearout Mechanisms in Advanced CMOS Technologies is ideal for students and new engineers who are looking to gain a working understanding of CMOS technology reliability. It is also suitable as a professional reference for experienced circuit design engineers, device design engineers, and process engineers.

 
 
 
Details
  • ISBN: 9780470455258
  • Publisher: John Wiley & Sons, Ltd.
  • Imprint: Wiley-IEEE Press
  • Date: Oct 2009
 
 
 
Creators

Author: Rolf-Peter Vollertsen
Bio:  
ROLF-PETER VOLLERTSEN, PhD, is a Principal for Reliability Methodology at Infineon Technologies AG in Munich, Germany, where he is responsible for methods and test structures for fast Wafer Level Reliability monitoring and the implementation of fast WLR methods.
Author: Ernest Y. Wu
Bio:  
ERNEST Y. WU, PhD, is a Senior Technical Staff Member at Semiconductor Research and Development Center (SRDC) in the IBM System and Technology Group. He has authored or coauthored more than 100 technical or conference papers. His research interests include dielectric/device reliability and electronic physics.
Author: Timothy D. Sullivan
Bio:  
TIMOTHY D. SULLIVAN, PhD, is Team Leader for metallization reliability at IBM's Essex Junction facility. The author of numerous technical papers and tutorials, he holds thirteen patents with several more pending.
Author: Giuseppe La Rosa
Bio:  
GIUSEPPE LaROSA, PhD, is Project Leader of the FEOL technology reliability qualification activities for the development of advanced SOI Logic and eDRAM technologies at IBM, where he is responsible for the implementation and development of state-of-the-art NBTI stress and test methodologies.
Author: Stewart E. Rauch, III
Bio:  
STEWART E. RAUCH, III, PhD, is currently a Senior Technical Staff Member at the IBM SRDC in New York, where he specializes in hot carrier and NBTI reliability of state-of-the-art CMOS devices. He is the author of numerous technical papers and tutorials and holds five patents.
Author: Jordi Sune
Bio:  
JORDI SUNE, PhD, is Professor of Electronics Engineering at the Universitat Aut¿noma de Barcelona, Spain. He is Senior Member of the IEEE and has coauthored over 150 publications on oxide reliability and electron devices. His research interests are in gate oxide physics, reliability statistics, and modeling of nanometer-scale electron devices.
Author: Alvin W. Strong
Bio:   ALVIN W. STRONG, PhD, is retired from IBM in Essex Junction, Vermont. He holds nineteen patents, has authored or coauthored a number of papers, and is a member of the IEEE and chair of the JEDEC 14.2 standards subcommittee.

 
 
 
Customer Reviews

 
 

DISCUSSION