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{ "item_title" : "Adiabatic Logic", "item_author" : [" Philip Teichmann "], "item_description" : "1 Introduction. 1.1 Motivation for this work. 1.2 A brief history of reversible computation and Adiabatic Logic. 2 Fundamentals of Adiabatic Logic. 2.1 Charging process in AL compared to static CMOS. 2.2 An adiabatic system. 2.3 Loss mechanisms in Adiabatic Logic. 2.4 Voltage scaling - A comparison of static CMOS and AL. 2.5 Properties and design considerations in AL. 2.6 General simulation setup. 3 Future trend in Adiabatic Logic. 3.1 Scaling trends for sub 90nm transistors. 3.2 Adiabatic Logic with novel devices. 3.3 NBTI and HCI in Adiabatic Logic. 4 Generation of the power-clock. 4.1 Introduction. 4.2 Topologies of inductor-based power-clock generators. 4.3 Impact of pattern--induced variations. 4.4 Generation of the synchronization signals. 5 Power-Clock Gating. 5.1 Introduction to Power--Clock Gating. 5.2 The theory of Power--Clock Gating. 5.3 Gating topologies for PCG. 5.4 Power--down mode for the synchronous 2N2P LC-oscillator. 6 Arithmetic structures in Adiabatic Logic. 6.1 Design of arithmetic structures. 6.2 Overhead reduction by applying complex gates. 6.3 Multi--operand adders and the CORDIC algorithm. 7 Measurement results of an adiabatic FIR filter. 7.1 Structure of the adiabatic FIR filter. 7.2 Measurement results and comparison to static CMOS. 8 Conclusions.", "item_img_path" : "https://covers4.booksamillion.com/covers/bam/9/40/072/344/940072344X_b.jpg", "price_data" : { "retail_price" : "109.99", "online_price" : "109.99", "our_price" : "109.99", "club_price" : "109.99", "savings_pct" : "0", "savings_amt" : "0.00", "club_savings_pct" : "0", "club_savings_amt" : "0.00", "discount_pct" : "10", "store_price" : "" } }
Adiabatic Logic|Philip Teichmann

Adiabatic Logic : Future Trend and System Level Perspective

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Overview

1 Introduction. 1.1 Motivation for this work. 1.2 A brief history of reversible computation and Adiabatic Logic.

2 Fundamentals of Adiabatic Logic. 2.1 Charging process in AL compared to static CMOS. 2.2 An adiabatic system. 2.3 Loss mechanisms in Adiabatic Logic. 2.4 Voltage scaling - A comparison of static CMOS and AL. 2.5 Properties and design considerations in AL. 2.6 General simulation setup.

3 Future trend in Adiabatic Logic. 3.1 Scaling trends for sub 90nm transistors. 3.2 Adiabatic Logic with novel devices. 3.3 NBTI and HCI in Adiabatic Logic.

4 Generation of the power-clock. 4.1 Introduction. 4.2 Topologies of inductor-based power-clock generators. 4.3 Impact of pattern--induced variations. 4.4 Generation of the synchronization signals.

5 Power-Clock Gating. 5.1 Introduction to Power--Clock Gating. 5.2 The theory of Power--Clock Gating. 5.3 Gating topologies for PCG. 5.4 Power--down mode for the synchronous 2N2P LC-oscillator.

6 Arithmetic structures in Adiabatic Logic. 6.1 Design of arithmetic structures. 6.2 Overhead reduction by applying complex gates. 6.3 Multi--operand adders and the CORDIC algorithm.

7 Measurement results of an adiabatic FIR filter. 7.1 Structure of the adiabatic FIR filter. 7.2 Measurement results and comparison to static CMOS.

8 Conclusions.

This item is Non-Returnable

Details

  • ISBN-13: 9789400723443
  • ISBN-10: 940072344X
  • Publisher: Springer
  • Publish Date: October 2011
  • Dimensions: 9.21 x 6.14 x 0.5 inches
  • Shipping Weight: 0.97 pounds
  • Page Count: 166

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