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Advanced Hdl Synthesis and Soc Prototyping : Rtl Design Using Verilog
Overview
Explains SOC architecture and micro-architecture design with case studies
Covers practical scenarios and issues, helpful to both students and professionals
Discusses systems design and testing scenarios using modern FPGAs
This item is Non-Returnable
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Details
- ISBN-13: 9789811087752
- ISBN-10: 981108775X
- Publisher: Springer
- Publish Date: January 2019
- Dimensions: 9.21 x 6.14 x 0.75 inches
- Shipping Weight: 1.41 pounds
- Page Count: 307
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