{ "item_title" : "Architectural Optimizations in Multi-Core Processors", "item_author" : [" Sevin Fide "], "item_description" : "The quest for greater computational power is never-ending. Recently, the architectural trend has shifted from improving single-threaded application performance to improving multi-threaded application per-formance. Thus, multi-core processors have been increasingly popular. To achieve concurrent execution of threads on multi-core processors, applications must be explicitly restructured to exploit parallelism, either by programmers or compilers. However, conventional parallel pro-gramming models may introduce overhead due to synchronization and communications among threads in multi-threaded applications. This book presents three architectural optimizations to improve thread-based synchronization and communications support in multi-core processors. Register-Based Synchronization (RBS) uses hardware registers efficiently to provide synchronization support in multi-core processors. Prepushing is a software controlled data forwarding technique to provide communications support in multi-core processors. Software Controlled Eviction (SCE) improves shared cache communications by placing shared data in shared caches.", "item_img_path" : "https://covers2.booksamillion.com/covers/bam/3/63/910/157/363910157X_b.jpg", "price_data" : { "retail_price" : "63.72", "online_price" : "63.72", "our_price" : "63.72", "club_price" : "63.72", "savings_pct" : "0", "savings_amt" : "0.00", "club_savings_pct" : "0", "club_savings_amt" : "0.00", "discount_pct" : "10", "store_price" : "" } }

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