{
"item_title" : "Implementation of a Binary Floating Point Fused Multiply-Add Unit",
"item_author" : [" Abdel Aziz Ibrahim Walaa", "Aly Fahmy Hossam", "Hussien Khalil Ahmed "],
"item_description" : "The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.",
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Implementation of a Binary Floating Point Fused Multiply-Add Unit
Overview
The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.
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Details
- ISBN-13: 9783846546215
- ISBN-10: 3846546216
- Publisher: LAP Lambert Academic Publishing
- Publish Date: December 2012
- Dimensions: 9 x 6 x 0.25 inches
- Shipping Weight: 0.36 pounds
- Page Count: 104
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