{ "item_title" : "Network-On-Chip Architectures", "item_author" : [" Chrysostomos Nicopoulos", "Vijaykrishnan Narayanan", "Chita R. Das "], "item_description" : "Abstract. Acknowledgments. 1. Introduction. 2. A Baseline NoC Architecture Part I MICRO-Architectural Exploratioin 3. ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers. 4. RoCo: The Row-Column Decoupled Router. 5. Exploring Fault-Tolerant Network-on-Chip Architectures. 6. On the Effects of Process Variation in Network-on-Chip Architectures. Part II MACRO-Architectural Exploration 7. The Quest for Scalable On-Chip Interconnection Networks. 8. Design and Management of 3D Chip Multiprocessors Using Network-In-Memory (NetInMem). 9. A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures. 10. Digest of Additional NoC MACRO-Architectural Research. 11. Conclusions & Future Work. References.", "item_img_path" : "https://covers3.booksamillion.com/covers/bam/9/04/813/030/9048130301_b.jpg", "price_data" : { "retail_price" : "169.99", "online_price" : "169.99", "our_price" : "169.99", "club_price" : "169.99", "savings_pct" : "0", "savings_amt" : "0.00", "club_savings_pct" : "0", "club_savings_amt" : "0.00", "discount_pct" : "10", "store_price" : "" } }

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