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"item_title" : "Spacer Engineered Finfet Architectures",
"item_author" : [" Sudeb Dasgupta", "Brajesh Kumar Kaushik", "Pankaj Kumar Pal "],
"item_description" : "This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations. ",
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Spacer Engineered Finfet Architectures : High-Performance Digital Circuit Applications
Other Available Formats
Overview
This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
This item is Non-Returnable
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Details
- ISBN-13: 9780367573553
- ISBN-10: 0367573555
- Publisher: CRC Press
- Publish Date: June 2020
- Dimensions: 9.1 x 6.1 x 0.5 inches
- Shipping Weight: 0.6 pounds
- Page Count: 138
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