menu
{ "item_title" : "Transactions on High-Performance Embedded Architectures and Compilers II", "item_author" : [" Per Stenström", "David Whalley "], "item_description" : "Special Section on High-Performance Embedded Architectures and Compilers.- Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches.- Compiler-Assisted Memory Encryption for Embedded Processors.- Branch Predictor Warmup for Sampled Simulation through Branch History Matching.- Data Cache Techniques to Save Power and Deliver High Performance in Embedded Systems.- Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization.- Regular Papers.- Accurate Instruction Pre-scheduling in Dynamically Scheduled Processors.- Fetch Gating Control through Speculative Instruction Window Weighting.- Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers.- Linux Kernel Compaction through Cold Code Swapping.- Complexity Effective Bypass Networks.- A Context-Parameterized Model for Static Analysis of Execution Times.- Reexecution and Selective Reuse in Checkpoint Processors.- Compiler Support for Code Size Reduction Using a Queue-Based Processor.- Power-Aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC.- Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories.", "item_img_path" : "https://covers2.booksamillion.com/covers/bam/3/64/200/903/3642009034_b.jpg", "price_data" : { "retail_price" : "54.99", "online_price" : "54.99", "our_price" : "54.99", "club_price" : "54.99", "savings_pct" : "0", "savings_amt" : "0.00", "club_savings_pct" : "0", "club_savings_amt" : "0.00", "discount_pct" : "10", "store_price" : "" } }
Transactions on High-Performance Embedded Architectures and Compilers II|Per Stenström

Transactions on High-Performance Embedded Architectures and Compilers II

local_shippingShip to Me
In Stock.
FREE Shipping for Club Members help

Overview

Special Section on High-Performance Embedded Architectures and Compilers.- Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches.- Compiler-Assisted Memory Encryption for Embedded Processors.- Branch Predictor Warmup for Sampled Simulation through Branch History Matching.- Data Cache Techniques to Save Power and Deliver High Performance in Embedded Systems.- Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization.- Regular Papers.- Accurate Instruction Pre-scheduling in Dynamically Scheduled Processors.- Fetch Gating Control through Speculative Instruction Window Weighting.- Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers.- Linux Kernel Compaction through Cold Code Swapping.- Complexity Effective Bypass Networks.- A Context-Parameterized Model for Static Analysis of Execution Times.- Reexecution and Selective Reuse in Checkpoint Processors.- Compiler Support for Code Size Reduction Using a Queue-Based Processor.- Power-Aware Bus Coscheduling for Periodic Realtime Applications Running on Multiprocessor SoC.- Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories.

This item is Non-Returnable

Details

  • ISBN-13: 9783642009037
  • ISBN-10: 3642009034
  • Publisher: Springer
  • Publish Date: April 2009
  • Dimensions: 9.37 x 6.3 x 0.78 inches
  • Shipping Weight: 1.15 pounds
  • Page Count: 327

Related Categories

You May Also Like...

    1

BAM Customer Reviews