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{ "item_title" : "High-Level Synthesis", "item_author" : [" Philippe Coussy", "Adam Morawiec "], "item_description" : "High-level synthesis - also called behavioral and architectural-level synthesis - is a key design technology to realize systems on chip/package of various kinds, whether single or multi-processors, homogeneousor heterogeneous, for the emb- ded systems market or not. Actually, as technology progresses and systems become increasingly complex, the use of high-level abstractions and synthesis methods becomes more and more a necessity. Indeed, the productivityof designers increases with the abstraction level, as demonstrated by practices in both the software and hardware domains. The use of high-level models allows designers with systems, rather than circuit, backgroundto be productive, thus matching the trend of industry whichisdeliveringanincreasinglylargernumberofintegratedsystemsascompared to integrated circuits. The potentials of high-level synthesis relate to leaving implementation details to the design algorithms and tools, including the ability to determine the precise timing of operations, data transfers, and storage. High-level optimization, coupled with high-levelsynthesis, canprovidedesignerswith the optimalconcurrencystr- ture for a data ow and corresponding technological constraints, thus providing the balancing act in the trade-offbetween latency and resource usage. For complex s- tems, the design space exploration, i.e., the systematic search for the Pareto-optimal points, can only be done by automated high-level synthesis and optimization tools. Nevertheless, high-level synthesis has been showing a long gestation period. Despite early resultsin the 1980s, it is still not commonpracticein hardwaredesign.", "item_img_path" : "https://covers4.booksamillion.com/covers/bam/1/40/208/587/1402085877_b.jpg", "price_data" : { "retail_price" : "109.99", "online_price" : "109.99", "our_price" : "109.99", "club_price" : "109.99", "savings_pct" : "0", "savings_amt" : "0.00", "club_savings_pct" : "0", "club_savings_amt" : "0.00", "discount_pct" : "10", "store_price" : "" } }
High-Level Synthesis|Philippe Coussy

High-Level Synthesis : From Algorithm to Digital Circuit

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Overview

High-level synthesis - also called behavioral and architectural-level synthesis - is a key design technology to realize systems on chip/package of various kinds, whether single or multi-processors, homogeneousor heterogeneous, for the emb- ded systems market or not. Actually, as technology progresses and systems become increasingly complex, the use of high-level abstractions and synthesis methods becomes more and more a necessity. Indeed, the productivityof designers increases with the abstraction level, as demonstrated by practices in both the software and hardware domains. The use of high-level models allows designers with systems, rather than circuit, backgroundto be productive, thus matching the trend of industry whichisdeliveringanincreasinglylargernumberofintegratedsystemsascompared to integrated circuits. The potentials of high-level synthesis relate to leaving implementation details to the design algorithms and tools, including the ability to determine the precise timing of operations, data transfers, and storage. High-level optimization, coupled with high-levelsynthesis, canprovidedesignerswith the optimalconcurrencystr- ture for a data ow and corresponding technological constraints, thus providing the balancing act in the trade-offbetween latency and resource usage. For complex s- tems, the design space exploration, i.e., the systematic search for the Pareto-optimal points, can only be done by automated high-level synthesis and optimization tools. Nevertheless, high-level synthesis has been showing a long gestation period. Despite early resultsin the 1980s, it is still not commonpracticein hardwaredesign.

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Details

  • ISBN-13: 9781402085871
  • ISBN-10: 1402085877
  • Publisher: Springer
  • Publish Date: August 2008
  • Dimensions: 9.3 x 6.3 x 0.9 inches
  • Shipping Weight: 1.35 pounds
  • Page Count: 297

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