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{ "item_title" : "System-On-A-Chip Verification", "item_author" : [" Prakash Rashinkar", "Peter Paterson", "Leena Singh "], "item_description" : "System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application. System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; and Limitations of the option. This exciting new book will be of interest to all designers and test professionals.", "item_img_path" : "https://covers3.booksamillion.com/covers/bam/0/79/237/279/0792372794_b.jpg", "price_data" : { "retail_price" : "179.00", "online_price" : "179.00", "our_price" : "179.00", "club_price" : "179.00", "savings_pct" : "0", "savings_amt" : "0.00", "club_savings_pct" : "0", "club_savings_amt" : "0.00", "discount_pct" : "10", "store_price" : "" } }
System-On-A-Chip Verification|Prakash Rashinkar

System-On-A-Chip Verification : Methodology and Techniques

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Overview

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:

  1. Explanation of the objective involved in performing verification after a given design step;
  2. Features of options available;
  3. When to use a particular option;
  4. How to select an option; and
  5. Limitations of the option.
This exciting new book will be of interest to all designers and test professionals.

This item is Non-Returnable

Details

  • ISBN-13: 9780792372790
  • ISBN-10: 0792372794
  • Publisher: Springer
  • Publish Date: December 2000
  • Dimensions: 9.62 x 6.5 x 1.07 inches
  • Shipping Weight: 1.7 pounds
  • Page Count: 372

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